Bold People. <BR>Bright Ideas.

Bold People.
Bright Ideas.

At Teradar, innovation starts with our people, fearless thinkers united by curiosity and driven to push the boundaries of what’s possible. We build, experiment, and reimagine the future of sensing together, one breakthrough at a time.
We believe in a world where every journey is safer, every life is protected, and innovation unlocks new hope, because vision can change everything.
We believe in a world where every journey is safer, every life is protected, and innovation unlocks new hope, because vision can change everything.
— Matthew Carey, CEO

Current Openings

Join a team that’s redefining the future of sensing.
Job title
Department
Location
Job title Chip Test Engineer
RF Systems
Boston
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Department RF Systems
Location Boston

We are looking for a Chip Test Engineer with deep expertise in RF, digital, and analog/mixed-signal testing to lead the development of test solutions from initial silicon bring-up through high-volume production.

This role is critical in bridging R&D and manufacturing, taking early proof-of-concept validation setups and scaling them into robust wafer-level and ATE production test solutions for our advanced sensor ICs used in ADAS and autonomous driving applications.

Location: Seaport, Boston, MA

What You’ll Do

  • Lead initial silicon bring-up and bench validation for new ICs, including debugging and characterization of first silicon.
  • Develop proof-of-concept (PoC) test setups using lab equipment and translate these into scalable production test methodologies.
  • Design and implement production test solutions at:
    • Wafer level (probe)
    • ATE platforms (e.g., Teradyne, Advantest)
  • Own the full lifecycle of test development: bench → characterization → correlation → production release.
  • Develop and optimize test programs, scripts, and automation using C++, Python, or similar tools.
  • Work closely with design (RF, analog, digital), systems, and product engineering teams to define test coverage and ensure alignment with specifications.
  • Perform correlation between bench measurements and ATE results, ensuring accuracy and repeatability.
  • Characterize and validate performance of:
    • RF circuits
    • ADCs
    • DSP blocks
    • Mixed-signal subsystems
  • Support testing of multi-chip module (MCM) packages, including system-level validation considerations.
  • Analyze test data to identify yield issues, parametric shifts, and failure modes using tools like JMP, Spotfire, or similar.
  • Drive test time reduction, yield improvement, and cost optimization in production.
  • Collaborate with OSATs and test vendors to deploy and qualify test solutions in manufacturing.

What You Bring

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in semiconductor test engineering, with strong product engineering exposure.
  • Proven experience across:
    • Bench testing and silicon bring-up
    • Test development and characterization
    • Production test implementation (wafer probe + ATE)
  • Strong hands-on experience with:
    • RF test methods (e.g., spectrum analysis, signal generation)
    • Analog and mixed-signal validation
    • High-speed digital testing
  • Familiarity with testing:
    • RF circuits
    • ADCs
    • DSP-based systems
  • Experience working with multi-chip module (MCM) packages is highly desirable.
  • Proficiency in ATE platforms such as Teradyne or Advantest.
  • Strong programming skills in Python, C++, or similar for automation and data analysis.
  • Hands-on experience with lab equipment such as:
    • Oscilloscopes
    • Spectrum analyzers
    • Signal generators
    • Network analyzers
  • Strong understanding of correlation between lab and production environments.
  • Excellent debugging, analytical, and problem-solving skills.

Bonus Points

  • Experience with mmWave or RFIC-based systems.
  • Background in automotive semiconductor products (ADAS/AV).
  • Experience working closely with OSATs for test transfer and yield ramp.

Prior experience in a startup or fast-paced product development environment.

Job title IC PACKAGING ENGINEER
Silicon Engineering
Bay Area, Boston
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Department Silicon Engineering
Location Bay Area, Boston

Responsibilities

  • Technical leadership, guiding the design and execution of advanced IC packages for multi-chip RFIC/SoC integration.
  • Develop 2.5D packages with UCIe chip-to-chip interconnects and interposer-based solutions.
  • Work on single-sided and double-sided RDL designs and on-package RF antenna structures.
  • Co-optimize package designs for signal integrity, power integrity, thermal, and mechanical performance in collaboration with RFIC, digital, and system engineers.
  • Drive material selection, DFM, and reliability qualification to meet automotive-grade requirements (AEC-Q).
  • Perform stress, warpage, and thermal simulations using tools such as ANSYS.
  • Maintain and leverage relationships with OSATs, substrate suppliers, and ecosystem partners to accelerate development.
  • Create and review electrical performance analysis (signal path length, PDN, crosstalk/noise etc.), mechanical analysis and drawings, stack-ups, and layout constraints.
  • Lead failure analysis and root cause investigations for packaging and reliability issues and provide solutions to increase yield.
  • Contribute to the packaging roadmap and scalability plan for automotive volume production.

Key Qualifications

  • 10+ years of experience in IC packaging design and development, including leadership responsibilities.
  • Proven track record with multi-chip packages, digital + RF integration, and automotive applications.
  • Deep knowledge of UCIe interconnects, organic substrates, interposers, and advanced packaging architectures.
  • Experience with RF antenna integration in package designs.
  • Proficient in Flip-Chip, Fan-Out, 2.5D integration, and heterogeneous system-in-package solutions.
  • Strong understanding of packaging electrical performance such as signal and power integrity, mechanical stress, thermal management, and reliability analysis.
  • Established network with packaging vendors and OSATs.
  • M.S. or Ph.D. in Mechanical Engineering, Materials Science, Electrical Engineering, or related field.
  • Excellent communication skills and ability to thrive in a fast-paced start-up environment.

Why Join

  • Technical oversight, defining packaging solutions for breakthrough ADAS technology.
  • Collaborate with a world-class engineering team spanning RFIC, SoC, and system design.
  • Be part of a well-funded start-up bringing innovative sensing technology to market.
  • Competitive compensation, stock options, and flexible work arrangements.

Location

Hybrid work from one of our offices:

  • Bay Area, CA
  • Boston, MA
Job title RF SYSTEMS ENGINEER
RF Systems
Boston
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Department RF Systems
Location Boston

Teradar is seeking a driven and organized RF Systems Engineer with a background in radar systems, RF, or electromagnetics to help bring the world’s first THz phased array imaging system to market.

You’ll work cross-functionally with IC design, antenna/array, signal processing, PCB, packaging, and software teams to support system integration, testing, and characterization of internally developed mmWave ICs. You’ll also play a key role in improving performance, measurement techniques, and scaling system testing.

Most days will involve hands-on debugging and OTA testing of chips and subsystems; others will focus on developing new calibration and test methods and driving implementation logistics. Your work will be central to the technical success and scale-up of the company’s next-gen radar platform.

What You Will Do

  • Perform system integration and bring up new versions of the radar system
  • Develop and implement new measurement and calibration methods for the radar system
  • Develop processes and automation for characterizing a high volume of systems across
  • process and temperature corners.
  • Solve or participate in solving customer facing system capability improvements
  • Manage hardware responsibilities for phased array characterization and analog
  • beamforming
  • Debug issues with system performance.
  • Characterize chipsets over the air using VNAs, spectrum analyzers and frequency extender modules

What You Will Bring 

  • Advanced experience with phased array radars
  • Experience working at a start-up or high-growth oriented company
  • Eager to learn new material, especially related to RF test methods as well as RF system
  • design and integration.
  • Experience doing over the characterization of antennas and beamforming networks
  • System and device level understanding of amplifiers, mixers, phase shifters and other RF components.
  • Experience using VNAs, spectrum analyzers and other high frequency lab equipment.
  • Strong attention to detail, project/time management, and organizational skills

Location
Boston MA (onsite)

Job title DSP SOFTWARE DEVELOPER
Software
Boston
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Department Software
Location Boston

If your jam is low-level programming, high-performance DSPs, and working close to the metal, this one’s for you.

What You Will Do 

  • Profile, analyze, and optimize performance, power, and area trade-offs in software designs.
  • Develop and optimize embedded software for high-performance multicore DSP platforms.
  • Leverage SIMD, VLIW, and fractional arithmetic techniques to deliver efficient signal processing and linear algebra algorithms.
  • Work closely with hardware design teams to understand instruction set architectures (ISA) and micro-architectures details, ensuring software takes full advantage of the hardware.
  • Integrate DMA strategies to maximize data throughput.
  • Build, use, and maintain pre-silicon validation platforms such such as virtual prototypes for early software development and testing.

What You Will Bring

  • Strong experience programming for embedded processors or low-level systems.
  • Solid understanding of computer architecture and micro-architecture fundamentals.
  • Hands-on experience with SIMD and VLIW programming models.
  • Knowledge of DMA integration in embedded systems.
  • Familiarity with fractional arithmetic in DSP applications.
  • Experience working with instruction set architecture (ISA) documentation or development.
  • Exposure to virtual prototypes or pre-silicon validation platforms.
  • Proficiency in C/C++, Assembly, Intrinsics
  • Ability to analyze performance bottlenecks and optimize for PPA.

Bonus Points 

  • Individuals who have worked with CEVA DSPs, particularly the SensePro family (SP500/SP1000) and MRD accelerators, will be exceptionally well-suited for this role.
  • Familiarity with CEVA’s instruction set, toolchains, and performance optimization techniques will be highly advantageous, especially in the context of high-performance signal processing for sensing applications.

Location
Boston MA (hybrid)

What we believe in

Submit a Resume

Teradar is calling on the bold, the curious, and the relentless to help shape the future of sensing technology. If you’re ready to build what’s never been built before, we encourage you to send us your resume.

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